DSP is a complex system with a large variety of sub-systems. Therefore, external electromagnetic radiation and interference between internal components, sub-systems, and transmission channels are important for DSP and its data information. The interference generated has seriously threatened the stability, reliability and safety of its work.
1. Electromagnetic Compatibility in DSP Hardware
Electromagnetic compatibility (EMC) contains both system emissions and sensitivities. If interference cannot be completely eliminated, interference must be minimized. If a DSP system meets the following three conditions, the system is electromagnetically compatible.
(1) No interference with other systems;
(2) Insensitive to the emission of other systems;
(3) No interference with the system itself.
1.1 Main sources of interference in DSP
Electromagnetic interference is generated by conductors or by radiation. Many sources of electromagnetic radiation, such as sunlight, relays, DC motors, and fluorescent lamps, can cause interference. The internal circuitry of AC power cords, interconnect cables, metal cables, and subsystems may also generate radiation or receive unwanted signals. In high-speed digital circuits, the clock circuit is usually the largest source of broadband noise. In fast DSP systems, these circuits can produce up to 300MHz harmonically distorted signals that should be removed in the system. In digital circuits, the most vulnerable are the reset lines, interrupt lines, and control lines.
1.2 Conductive interference in DSP
One of the most obvious paths that can cause circuit noise is through conductors. A wire that passes through a noisy environment can pick up the noise and send the noise to another circuit to cause interference. Designers must avoid wire pick-up noise, such as noise entering the circuit through the power line. If the power supply itself or other circuit connected to the power supply is a source of interference, the power line must be decoupled before it enters the circuit.
1.3 Common Impedance Coupling Problems in DSP
Co-impedance coupling occurs when current from two different circuits flows through a common impedance. The voltage drop across the impedance is determined by two circuits. The ground currents from the two circuits flow through the common ground impedance, the ground potential of the circuit 1 is modulated by the ground current 2, and the noise signal or DC offset is coupled from the circuit 2 to the circuit 1 via the common ground impedance.
1.4 radiative coupling problem in DSP
The coupling produced by radiation is called crosstalk. Crosstalk is caused by the electromagnetic field generated when current flows through a conductor. An electromagnetic field induces transient currents in adjacent conductors.
1.5 radiation phenomenon in DSP
There are two basic types of radiation: differential (DM) and common mode (CM). Common mode radiation or monopole antenna radiation is caused by an unintentional voltage drop, which raises all ground connections in the circuit above the system ground potential. In terms of the size of the electric field, CM radiation is a more serious problem than DM radiation. To minimize CM radiation, the common design current must be reduced to zero with a realistic design.
1.6 Factors Affecting EMC
(1) Voltage: The higher the supply voltage, the higher the voltage amplitude and the more the emission, while the low supply voltage affects the sensitivity.
(2) Frequency: High-frequency signals and periodic signals generate more radiation. In a high-frequency digital system, a current spike is generated when the device is in a switching state; in an analog system, a current spike is also generated when the load current changes.
(3) Grounding: In circuit design, there is no more important thing than adopting a reliable and perfect ground connection. In all EMC problems, most problems are caused by improper grounding. There are single, multiple and mixed signal grounding methods.
A single-point grounding method can be used when the frequency is lower than 1 MHz. In a high-frequency application, a multi-point grounding is preferable. The hybrid grounding is a combination of a single-point grounding for low-frequency and a multi-point grounding method for a high frequency. However, the ground loop of the high-frequency digital circuit and the low-level analog circuit must not be mixed.
(4) PCB design: Proper printed circuit board (PCB) layout is essential to prevent electromagnetic interference.
(5) Power supply decoupling: When the device is switched on, transient currents are generated on the power line. These transient currents must be attenuated and filtered out. Transient currents from the high di/dt source result in ground and trace “emissionsâ€. Voltage. High di/dt produces a wide range of high-frequency currents that excite component and cable radiation. Current variations and inductances flowing through the conductors cause voltage drops. Minimizing this voltage drop by reducing the inductance or current change over time.
1.7DSP hardware noise reduction technology
1.7.1 Noise Reduction Techniques in Board Structure and Line Arrangement
(1) Using a ground and a power supply board;
(2) The plate area should be large in order to provide low impedance for power supply decoupling;
(3) Minimize surface conductors;
(4) Use narrow lines (4 to 8 mils) to increase high frequency damping and reduce capacitive coupling;
(5) Separate digital, analog, receiver, transmitter ground/power lines;
(6) Separate circuits on the PCB according to frequency and type;
(7) Do not cut the PCB, the traces near the cut may cause unwanted loops;
(8) The use of a laminated structure is the best preventive measure against most signal integrity problems and EMC problems. It can effectively control the impedance, and its internal traces can form an easily understandable and predictable transmission line structure. And to seal the trace between the power supply and the floor;
(9) Keep the spacing between adjacent excitation traces larger than the width of the trace to minimize crosstalk;
(10) The clock signal loop area should be as small as possible;
(11) High-speed lines and clock signal lines should be short and must be directly connected;
(12) Sensitive traces should not be paralleled with traces that transmit high-current fast switching signals;
(13) Do not have floating digital inputs to prevent unnecessary switching and noise generation;
(14) Avoid power supply traces under the crystal and other inherent noise circuits;
(15) Corresponding power supply, ground, signal and loop traces should be set in parallel to eliminate noise;
(16) Separate the clock line, bus and slice enable from the input/output lines and connectors;
(17) Make the route clock signal and the I/O signal in orthogonal positions;
(18) In order to minimize crosstalk, the traces are crossed at right angles and scattered across the ground;
(19) Protect critical stitches (using 4 mils to 8 mils stitches to minimize inductance, route close to the floor, sandwich structure between plies, and protect each side of the mezzanine to have ground).
1.7.2 Noise Reduction Using Filtering Techniques
(1) Filter the power line and all signals entering the PCB. Use high-frequency low-inductance ceramic capacitors (0.1mF for 14MHz and 0.01mF for more than 15MHz) to decouple each pin of the IC.
(2) All power supply and reference voltage pins of the bypass analog circuit;
(3) Bypass fast switching devices;
(4) Decouple the power/ground at the device lead;
(5) Use multi-stage filtering to attenuate multi-band power supply noise;
(6) The crystal oscillator is mounted on the board and grounded;
(7) Add shielding at appropriate places;
(8) Arranging adjacent ground lines next to the signal lines in order to more effectively prevent the emergence of new electric fields;
(9) Properly place the decoupling line driver and receiver close to the actual I/O interface, which can reduce the coupling of the PCB with other circuits and reduce the radiation and sensitivity;
(10) Shield and twist wires that interfere with each other to eliminate mutual coupling on the PCB;
(11) Clamp the diode on the inductive load.
2. Steps to take when designing DSP software
Software interference mainly manifests in the following aspects:
(1) Incorrect arithmetic produces erroneous results. The most important reason is that the index calculation of the program in the computer processor is an approximate calculation. The resulting result sometimes has a large error and is prone to malfunction.
(2) Because the accuracy of the computer is not high, the addition and subtraction operations must be performed on the orders and the large numbers "eat up" the decimals, resulting in the accumulation of errors, resulting in the occurrence of underflow, which is also one of the sources of noise;
(3) Due to hardware interference caused by the computer, such as: program counter PC value changes, data collection error increases, the control state is not working, RAM data is subject to interference changes and the system appears "deadlock" and other phenomena.
2.1 Method of intercepting runaway programs
(1) Single-byte instructions should be used during program design, and some empty operation instructions should be inserted at key points, or valid single-byte instructions should be repeated several times. This can protect the subsequent instructions from being broken up and make the program run. On Tracks;
(2) Adding software traps: When the PC value runs out of control and causes the program to run out of control, the CPU enters a non-program area. At this time, a boot instruction can be used to force the program to enter the initial entry state and enter the program area. A trap can be set up at intervals.
(3) Software reset: When the program goes “flyingâ€, the monitoring system is run, and the system is automatically reset and re-initialized.
2.2 Set up the mark judgment
Define a unit as a marker, set the value of the unit to a certain characteristic value in the main program of the module, and then determine whether the value of the unit is unchanged at the end of the main program. If it is different, it means there is an error and the program is transferred. Error handling routines.
2.3 increase data security backup
Important data is stored in more than two storage areas, and large-capacity external RAM can also be used to back up data. The permanent data is tabulated in the EPROM, which prevents data and tables from being destroyed and ensures that the data is not run as instructions when the program logic is confused.
3. Key considerations when designing with EDA tools
The design of high-speed digital circuits requires designers' experience on the one hand and excellent EDA tools on the other. The EDA software has become more versatile and intelligent. With the application of high-density single-chip, high-density connectors, micro-hole built-in technology, and 3D board in PCB layout for ball grid array packaging, layout and wiring have become more and more integrated and become a design process. important parts of.
Software technologies such as auto-layout and free-angle routing have gradually become an important method for solving such highly integrated problems. Using such software, a manufacturable circuit board can be designed within a specified time range. At present, due to the shorter and shorter time to market, manual wiring is extremely time-consuming and cannot meet the requirements. Therefore, it is now required that the place-and-route tools have an automatic routing function to quickly respond to the market's higher requirements for product design.
3.1 Automatic Wiring Technology
Due to electromagnetic compatibility (EMC) and high-density design factors such as electromagnetic interference, crosstalk, signal delay, and differential pair routing, the constraints of place and route are increasing every year. A few years ago, a typical circuit board required only 6 differential pairs for wiring, but now it requires 600 pairs. It is impossible to rely on manual cabling to achieve these 600 pairs of cabling within a certain period of time, so an automatic cabling tool is indispensable.
Although there is no major change in the number of nets in today's design compared to a few years ago, the complexity of the silicon has increased, but the proportion of important nodes in the design has greatly increased. Of course, for some particularly important nodes, the place-and-route tools are required to be able to distinguish, but there is no need to limit each pin or node.
3.2 methods that should pay attention to using free angle wiring technology
With the increase of integrated functions on a monolithic device, the number of output pins has also been greatly increased, but its package size has not been expanded. In addition, due to pin spacing and impedance factors, these devices must be used in more detail. The line width. At the same time, due to the overall reduction in product size, it means that the space for placement and routing is also greatly reduced. In some DSP products, the size of the backplane is almost the same as the size of the device above it, and the components occupy up to 80% of the board area.
Some high-density components have staggered pins, and even if a tool with a 45° routing function is used, automatic routing cannot be performed. The free-angle routing tool has great flexibility and maximizes the wiring density; its pull-tilt feature automatically shortens each node after cabling to accommodate space requirements; it significantly reduces signal delays. While reducing the number of parallel paths, it helps to avoid crosstalk.
The use of free-angle wiring technology enables the design to be manufacturable and the designed circuit performance is good.
3.3 Technology to be Used for High Density Devices
The latest high-density system-on-chips are packaged in BGA or COB packages with increasingly smaller pin pitches, ball pitches as low as 1mm, and will continue to decrease. This causes the package signal lines to be impossible to draw using traditional routing tools. There are currently two ways to solve this problem:
(1) Lead the signal line from the lower layer through the hole under the ball;
(2) Using a very fine wire and free angle wiring, find a lead channel in the ball grid array. For high-density devices, using a wiring method with a small width and space is the only feasible method, because only in this way can a higher yield be guaranteed. Modern wiring techniques also require that these constraints be automatically applied. The free wiring method can reduce the number of wiring layers and reduce the product cost. It also means that with the same cost, some ground planes and power planes can be added to improve signal integrity and EMC performance.
3.4 Adopting Other New Circuit Board Designs and Manufacturing Techniques
The application of micro-hole plasma etching technology in the manufacture of multi-layer boards in DSP greatly improves the performance of layout and routing tools. Applying a new hole in the path width using the plasma etching method does not lead to an increase in the bottom plate itself and the manufacturing cost, because the cost of making a thousand holes using plasma etching is as low as the cost of making a hole. This requires a more flexible routing tool, it must be able to apply different constraints, adapt to different micro-holes and build technology requirements.
The ever-increasing density of components also has an impact on the layout design. The place-and-route tool always assumes that there is enough room on the board to allow the component to release the machine to release the surface so that new components can be installed and not on the board. Components have an impact.
However, the sequential placement of components creates the problem that each time a new component is placed, the optimal position of each component on the board will change. This is why the degree of automation of the layout design process is low and human intervention is high.
Although the current layout tools have no restrictions on the number of components to be laid out in sequence, some technicians believe that the layout tools are actually limited when used in a sequential layout. The limit is about 500 components.
There are also some technicians who think that when there are up to 4,000 components placed on a board, there are big problems. Compared with sequential algorithm technology, parallel layout technology can achieve better automatic layout effect.
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