LingKe Anan officially released 8-bit multi-interface anti-piracy encryption chip

I. Introduction to LKT4103 Multi-Interface Encryption Chip The LKT4103 uses an enhanced 8051 smart card kernel. The chip is internally embedded in the LKCOS smart operating system of Lingke Security Company. The user can download some of the key algorithm functions of the MCU to the LKT4103 chip for operation. The user uses the standard C language to write the operating code and uses the KEIL C compiler to compile and download it to the smart chip. In the actual operation process, a program segment in the smart card chip is run by calling a function mode, and the operation result is obtained, and this result is used as the input data for the further operation of the user program. The LKT4103 became a part of the product, and the algorithm was operated inside the LKT4103. The pirates could not break it, fundamentally eliminating the possibility of the program being cracked. The internal hardware of the chip implements the SSF33 and SM1 algorithm-specific encryption modules, DES/3DES encryption module, and RSA public key algorithm engine required by the national commercial cryptographic products. The chip embedded 32-bit true random number generator RNG. The chip has a wealth of external interfaces, including USB Device controller, supports USB Low Speed, Full Speed ​​communication mode; 7816 master/slave transceiver, can implement T=0 and T=1 protocols, support multiple communication rates; hardware SPI Master/Slave module and 8 GPIO ports.

Second, the chip features 1, CPU high-performance 8-bit CPU, compatible with the standard 8051

- 1 instruction occupies 1 to 3 machine cycles - 1 machine cycle is 4 clock cycles (typical) compatible with the standard 8051 2. Storage - 48K byte program memory - 4K bytes NVM area - RAM, capacity is 12kB+256B

- One of the 256B IRAMs for the 8051 architecture

- Additional 12kB XRAM or CODE that can be used as 8051 architecture

- 8B The world's only CPSN, user read-only 3, encryption engine - DES algorithm dedicated hardware engine - RSA algorithm dedicated hardware engine - national secret algorithm dedicated hardware engine - SM1 dedicated hardware engine - SSF33 dedicated hardware engine - supports AES, DES and other symmetric algorithms - Supports asymmetric algorithms such as ECC and RSA - Supports SHA1, MD5 and other digest algorithms TRNG True random number generator supports the need for secure transactions CRC Dedicated hardware engine supports fast CRC check of data 4 External interface USB interface - USB device controller , Support USB Low Speed, Full Speed

- Electrically compatible 7816 interface that meets the requirements of the USB IF Full Speed ​​Low Speed ​​Electrical and Interoperability Compliance Test Procedure - Meets 7816-3 - Supports T=0 and T=1 protocols - Supports 10 baud rates (FD = 11 12, 13, 18, 91, 92, 93, 94, 95, 96)

- Supports 7816 master/slave communication - Supports GSM power consumption standards including Clock Stop mode GPIO

- 8 I/O ports - 3V signal amplitude - multiplexed IO resources with SPI interface SPI interface - hardware implemented SPI master/slave controller - 3V signal amplitude - multiplexed with GPIO IO resource security features - sensor (voltage, clock, Temperature, light)

- Filters (prevents spikes/burrs)

- Separate internal clock (reader CLK)

- (SFI) Detection Mechanism - Passive and Active Shields - Glue Logic (Difficult to Reverse Engineering Circuits)

- Handshake circuit - High-density multi-layer technology - With metal shield protection, self-destruction of internal data after external attacks detected - Bus and memory encryption - Virtual address (SW = Hardware address address!)

- Chip Tamper Design, Unique Serial Number - Hardware Error Detection - True Random Number Generator (RNG)

- Noise generation (attack to side channel)

- Pre-silicon power analysis - Internal data not readable, copy - Sensitive information for encryption (keys, pins)

- Double execution (such as encryption and decryption verification)

- Verification - Verification of program flow - unpredictable timing (eg random NOP)

- Cannot access the hardware platform directly, HAL (assembler), C

- Prevent buffer overflow - Prevent incorrect offsets. .

- Firewall Mechanism - Exception Counter - Execute Verification Code - Zeroed Keys and Pins