Many people configure the priority grouping method for this function NVIC_PriorityGroupConfig() in the firmware library when configuring the STM32 interrupt. It will be very difficult to understand, especially the Chinese translation version, because the Chinese translation version translates this into "preemptive priority". The translation of the level and the priority level is actually wrong, and it is easy to misunderstand.
In order to facilitate everyone's understanding, it is necessary to explain two concepts first:
Preemptive priority/response priority:
There are two priority concepts in STM32 (Cortex-M3) - preemptive priority and response priority. Some people refer to the response priority as 'sub-priority' or 'sub-priority'. Each interrupt source needs These two priorities are assigned.
Interrupts with high preemptive priority can be responded to during interrupt processing with low preemptive priority, ie interrupt nesting, or interrupts with high preemptive priority can be nested in interrupts with low preemptive priority. .
When the preemptive priorities of the two interrupt sources are the same, the two interrupts will have no nesting relationship. When one interrupt arrives, if another interrupt is being processed, the subsequent interrupt will wait until the previous interrupt is processed. Can be processed. If the two interrupts arrive at the same time, the interrupt controller decides which one to process first based on their response priority level; if their preemptive priority and response priority are equal, then according to their rank in the interrupt table The order determines which one to process first.
After reading the above introduction, I believe that everyone understands the relationship here. The summary is: preemptive priority > response priority > the ranking order in the interrupt table (where ">" is understood as the direction of comparison) .
It is precisely because each interrupt source needs to be assigned these two priorities, it needs to have the corresponding register bits to record the priority of each interrupt; 8 bits are defined in Cortex-M3 to set the priority of the interrupt source. Level, these 8 bits can be assigned in 8 ways, as follows:
1. All 8 bits are used to specify the response priority
2. The highest 1 bit is used to specify the preemptive priority, and the lowest 7 bits are used to specify the response priority.
3. The highest 2 bits are used to specify the preemptive priority and the lowest 6 bits are used to specify the response priority.
4. Up to 3 bits are used to specify preemptive priority, and the lowest 5 bits are used to specify response priority
5. Up to 4 bits are used to specify preemptive priority, and the lowest 4 bits are used to specify response priority
6. Up to 5 bits are used to specify preemptive priority, and the lowest 3 bits are used to specify response priority
7. Up to 6 bits are used to specify preemptive priority, and the lowest 2 bits are used to specify response priority
8. Up to 7 bits are used to specify preemptive priority and the lowest 1 is used to specify response priority
The above is the concept of priority grouping, but the Cortex-M3 allows the use of fewer register bits to specify the priority of the interrupt source with fewer interrupt sources, so the STM32 reduces the register bits that specify the interrupt priority to 4 bits. The grouping of register bits is as follows:
Group 0: All 4 bits are used to specify the response priority
Group 1: The highest 1 bit is used to specify the preemptive priority, and the lowest 3 bits are used to specify the response priority.
Group 2: Up to 2 bits are used to specify preemptive priority, and the lowest 2 bits are used to specify response priority
Group 3: Up to 3 bits are used to specify preemptive priority, and the lowest 1 is used to specify response priority
Group 4: All 4 bits are used to specify preemptive priority
Here is the relevant function in the firmware library of the most premise of the article - NVIC_PriorityGroupConfig (u32 NVIC_PriorityGroup), there are five kinds of parameters of the function:
The parameters of this function (NVIC_PriorityGroup value) have the following five types:
NVIC_PriorityGroup_0 => Select Group 0
NVIC_PriorityGroup_1 => Select Group 1
NVIC_PriorityGroup_2 => Select Group 2
NVIC_PriorityGroup_3 => Select Group 3
NVIC_PriorityGroup_4 => Select Group 4
This is actually very well understood. For example, if you choose NVIC_PriorityGroup_1, then the preemptive priority will occupy one bit, that is, you can have 2^1 levels, you can set it to 0 and 1, and the response priority will be 3 bits, that is, Say there can be 2^3 choices, you can set it to 0~7; in total, you can distinguish >16 priority levels (why is greater than not equal to, you should understand if you think about it)
For example, if there are 4 external interrupts and there is an EXTI9_5 interrupt, then if the priority grouping is selected as the first group, then there are only two preemptive priorities, and at least 3 of the 5 interrupts are preempted. The priority is on the same priority and the other two are on the other. Then there are 8 options for setting the response priority (that is, each interrupt must be designed with preemption priority and response priority); if there are two interrupts with the same preemptive priority at the same time, then the order of processing is who responds. If the priority is high, whoever enters the interrupt is preferred. In addition, this point needs attention. If you enter this interrupt and come back with a preemptive interrupt with the same priority but higher priority, it will not interrupt. Some are interrupted.
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